There are numerous software programs and hardware devices currently available which allow asynchronous serial communications to be performed by a host computer. The hardware devices typically contain a universal asynchronous receiver transmitter (UART), such as the 8250, 16450, or 16550, manufactured by National Semiconductor, Santa Clara, Calif. The software programs are designed to support one or more of these UART types. A typical serial communications card, which contains a UART, will function without difficulty up to and exceeding 19,200 bits per second (bps). However, in the case of the 8250 and the 16450 UARTs, each time a complete byte is received an interrupt must be generated and the host must read the received byte prior to completion of receipt of the next byte by the UART. Otherwise, data will be lost. Therefore, each time a complete byte is received the host computer must stop its current operation and execute an interrupt service routine which services the UART by reading the received byte. At low serial data rates this procedure does not present a problem. However, at higher data rates, the amount of time required to execute the service routine and retrieve the received byte may occupy substantially all of the host computer's processing time, thus leaving little or no time for the performance of other operations. The use of a 16550 UART, which has a 16 byte buffer, eliminates the need for immediate attention to an interrupt from the UART. However, the host computer must still service the UART at a sufficient rate to prevent the buffer from filling up or data will be lost.
The host computer may, of course, send through the UART a flow control command to a remote device which causes the remote device to stop sending data. However, the host computer must execute a flow control routine and several additional characters may be received before the remote device stops sending data.
Therefore, it is desirable to have a serial data communications device which provides enhanced functions such as additional buffering, automatic flow control, and direct memory access (DMA) data transfer. Of course, to use the enhanced functions the host computer must use a software program which was written to make use of the enhanced functions. The enhanced functions are most conveniently provided by the use of a microprocessor on the serial communications card. However, it is also desirable that the serial communications card be capable of providing enhanced functions and be compatible with software programs which do not support the use of the enhanced functions. Therefore, it is necessary that both the host computer and the microprocessor be able to access, when appropriate, the UART on the serial communications card. Because both the host computer and the microprocessor have access to the UART a data loss will occur if the host computer attempts to access the UART at the same time that the microprocessor was attempting to access the UART.
Furthermore, in a serial communications card which has two or more UARTs, each of which is independently configurable to achieve a desired serial interface, a data loss could occur if the host computer attempts to access one of the UARTs at a time when the microprocessor is attempting to access another of the UARTs. The bus contention problem between the host computer and the microprocessor becomes even more severe as serial data rates increase and both devices must access the bus more frequently in order to communicate with their respective UARTs.
Therefore, there is a need for a method and for an apparatus which prevents bus contention problems between two devices.
There is also a need for a bus management method and a bus management apparatus which prevent a loss of data when both the host computer and the microprocessor attempt to access the bus at the same time.
There is also a need for a method and for an apparatus for determining which of two devices will be able to access a bus at a particular time.
There is also a need for a method and for an apparatus which will deny a device access to a bus and advise the device that a requested data transfer will require additional time to execute.